3 February, 2026
uc-irvine-s-breakthrough-transceiver-rivals-fiber-optic-speeds-paving-way-for-6g

Irvine, Calif., Jan. 22, 2026 — In a groundbreaking development, electrical engineers at the University of California, Irvine, have unveiled a new wireless transceiver capable of achieving data speeds comparable to fiber-optic cables. This innovation marks a significant step towards the adoption of 6G and FutureG data transmission protocols.

The transceiver, developed by researchers at UC Irvine’s Samueli School of Engineering, operates at radio frequencies in the 140-gigahertz range. This advancement is made possible by a novel architecture that integrates digital and analog processing, resulting in a silicon chip system that significantly enhances data processing speed and energy efficiency.

Revolutionary Architecture and Design

The team, based in UC Irvine’s Nanoscale Communication Integrated Circuits Labs, has detailed their work in two papers published in the IEEE Journal of Solid-State Circuits. The first paper introduces the “bits-to-antenna” transmitter, while the second focuses on the “antenna-to-bits” receiver.

“We call this technology a ‘wireless fiber patch cord’ because it offers the blistering speed of fiber optics without the physical cables,” said Payam Heydari, NCIC Labs director and senior author of the papers. “By operating in the F-band, we can offer massive bandwidths that will transform how machines, robots, and data centers communicate.”

This breakthrough is the result of a strategic vision initiated in 2020. The team recognized that traditional mixed-signal chip architectures, which rely on energy-intensive data converters, would eventually hit a performance ceiling.

Overcoming Traditional Limitations

Heydari explained that to achieve the elusive 100-gigabit-per-second milestone, a fundamental rethinking of circuit topology was necessary. “We envisioned novel, all-analog architectures that could overcome the severe power trade-offs plaguing high-speed designs,” he said.

As wireless speeds increase, the power required to process data typically skyrockets, creating a bottleneck. “If we stuck to traditional methods, the battery life of next-generation devices would vanish in minutes,” Heydari noted. The new transceiver addresses this by performing complex calculations in the analog domain, bypassing the inefficiencies of digital processing.

Implications for Future Technologies

The transceiver’s ability to operate at 120 gigabits per second enables the transfer of multiple 4K movies in an instant. This capability is crucial as the Federal Communications Commission and 6G standards bodies explore the 100-gigahertz spectrum as the new frontier.

Zisong Wang, a former UC Irvine doctoral researcher and lead author of the “bits-to-antenna” paper, highlighted the complexity and power consumption challenges faced by conventional transmitters. The team’s design eliminates the need for digital-to-analog converters by constructing signals directly in the radio-frequency domain using synchronized subtransmitters.

“It’s like packing a suitcase perfectly before leaving the house rather than trying to organize it while running to the airport,” Wang said.

Future Applications and Potential

The method, known as RF-domain 64QAM, allows the chip to be incredibly efficient, sending more data without overheating. This efficiency is vital for the future of internet-connected products, autonomous vehicles, and AI edge computing, which rely on local data processing.

Youssef Hassan, a former UC Irvine researcher and lead author of the “antenna-to-bits” paper, explained the challenges traditional receivers face. “Moore’s law suggests we can just make transistors smaller to go faster, but at these extreme speeds, we hit a physical wall known as the sampling bottleneck,” he said.

Instead of forcing electronics to work harder, the team developed a smarter receiver using hierarchical analog demodulation. This technique breaks down signals hierarchically in the analog domain, extracting data with minimal power consumption.

The receiver chip, fabricated in 22-nanometer technology, consumes only 230 milliwatts of power, making it suitable for portable devices.

Economic and Technological Impact

Beyond its technical achievements, the transceiver’s architecture allows for cost-effective mass production, paving the way for widespread adoption. “Our innovation eliminates the need for miles of complex copper wiring inside data centers,” Heydari said. “Data farm operators can establish ultrafast wireless links between server racks, saving on hardware, cooling, and power costs.”

The research, supported by the U.S. Department of Defense Microelectronics Commons program, demonstrates that high-performance chips can be produced using standard manufacturing processes.

UC Irvine, founded in 1965, is a member of the prestigious Association of American Universities and ranks among the nation’s top public universities. With over 36,000 students and a significant economic impact, UC Irvine continues to lead in research and innovation.

For more information on UC Irvine and its groundbreaking research, visit www.uci.edu. Journalists can access additional resources at news.uci.edu/media-resources.